Some micro-processing systems support a speculative execution mode known as runahead. Runahead allows a microprocessor to pre-fetch and otherwise pre-process instructions during a stall condition or other latency event such as a cache miss. While the initial latency event is being serviced—e.g., the memory system is traversed to obtain requested data—execution moves forward speculatively to uncover additional latency events (e.g., stalls) in the code that are independent of the condition causing the initial event. The system then uses resources that would otherwise be idle to service these additional latency events while servicing the initial event. Once the initial event is resolved (e.g., the cache miss is resolved by obtaining the missing data), execution resumes via a checkpointing mechanism at the runahead entry point. The resumed execution will then be more efficient, in the sense that one or more additional latency events may be avoided (or resolved more quickly) due to them being serviced in the just-terminated runahead episode. In many systems, code executed during runahead is executed in more or less the same fashion as when encountered outside of runahead, which in various ways limits the ability of the system to address additional latency events.